发明名称 DATA TRANSFER CONTROL SYSTEM FOR MULTIPROCESSOR SYSTEM
摘要 PURPOSE:To increase the flexibility relating to system change and the efficiency of data transfer, by performing the transfer of data in data area when the corresponding flag is set. CONSTITUTION:A processor 1-1 writes in the data to a data area 3a of an image memory 3-1. After that, the flag of the input and output device 6 in the flag area 3a of the image memory 3-1 is set. The control device 7 always scans the flag area 3a image memories 3-1-3-n, and when it detects that the flag of the input and output device 6 is set, the data of the data area 3a of the image memory 3-1 is read out and it is transferred to the input and output device. Further, when the transfer of data is finished, the flag of the input and output device 6 is reset for the next scanning.
申请公布号 JPS56101233(A) 申请公布日期 1981.08.13
申请号 JP19800004032 申请日期 1980.01.16
申请人 MITSUBISHI ELECTRIC CORP 发明人 FUJII NOBUAKI;KAGAWA EIICHI
分类号 G06F3/05;G06F13/22;G06F13/38;G06F15/16;G06F15/177 主分类号 G06F3/05
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