| 摘要 |
PURPOSE:To make addition and subtraction of PCM signal, by providing only the addition table relating to the absolute value of input signal and indexing the addition table through the complement for one input signal according to the combined condition of the polarity of input signal. CONSTITUTION:Each polarity bit in two codes (a), (b), is input to a polarity processing circuit 34 with separation. Further, all the 7 bits in the amplitude bits of (a) and (b) are input to the addition table memory 33. The addition table memory 33 stores the result of addition of the absolute value of the amplitude of (a) and (b) in the form of codes in advance, and is indexed by taking the absolute value of two input signals (a) and (b) as the addresses. The output of the memory 33 is input to the polarity processing circuit 34 for the most significant bit only displaying carry, and it is directly output as the amplitude bit of the rest code or output in the form of complement via the complement generating circuit 32. |
