| 摘要 |
PURPOSE:To enable data processing of many bits with a bus line of less number of bits, by obtaining one pattern signal through a plurality of times of readout outputs from an input and output pattern memory device and using the data bus line in time sharing manner. CONSTITUTION:When the output of a body to be tested 1 is 8-16-bit, a storage device of 8-bit output is used for an output pattern storage device 17. That is, in testing an object to be tested with less number of bits, the output pattern in 8-bit is read out with one readout. When the object to be tested with many number of bits of output is read out, the output pattern in 16-bit is read out with the readout of two times. Registers 20a, 20b have respectively the capacity of 8-bit, and when the object to be tested of less number of bits is tested, the readout output of a storage device 17 is contained only in a register 20a, and when the object to be tested for many number of bits is tested, the output is alternately stored in 20a and 20b, and data are processed via a data bus line D. With this constitution, the data processing in many number of bits is made with the bus line of less number of bits. |
