发明名称 FOURRQUADRANT SEMICONDUCTOR MULTIPLYING CIRCUIT
摘要 PURPOSE:To simplify the constitution of the noncyclic filter, by using one FET of MOS structure in the multiplying circuit of the analogue signal and by eliminating the error of the operation result generated by variance of the size and the characteristic of two FETs. CONSTITUTION:Analogue signal vd superposed onto DC voltage Vd applied to input terminal 10 is applied to the drain (or the source) of FET20 of MOS structure, and analog signal vg and analogue Vg+vg where DC voltage Vg is superposed onto signal vg are applied to the gate through switches 26 and 27 using FETs. The result operated by this FET20 is supplied to current/voltage converter 21 constituted by operational amplifier 22 and resistance 22', and the signal converted to a voltage by converter 21 is applied to sample hold circuits 23 and 24 through switches 26' and 27' using FETs, and outputs of circuits 23 and 24 are supplied to subtracting circuit 25. Then, one FET20 of MOS structure is used in the multiplying circuit, and the error of the operation result is eliminated, and the constitution of the four-quadrant semiconductor multiplying circuit is simplified.
申请公布号 JPS5699570(A) 申请公布日期 1981.08.10
申请号 JP19800001174 申请日期 1980.01.09
申请人 NIPPON ELECTRIC CO 发明人 ENOMOTO TADAYOSHI
分类号 G06G7/163;(IPC1-7):06G7/163 主分类号 G06G7/163
代理机构 代理人
主权项
地址