发明名称 PREPARATION OF INSULATED GATE FET
摘要 PURPOSE:To obtain the self-aligned level IGFET, by making use of the ion implantation and the anodization. CONSTITUTION:On the P type Si substrate 11 the Al film 12 is adhered and at the center of this part the mask 13 of SiO2 film is formed by the CVD method at the temperature of about 500 deg.C. In the substrate 11 on both side of the mask 13, the As or P ions are implanted to form the N type source and drain region 14. Next the mask 16 is formed by the same method on the part to be the electrode of these, and the O2 ions are implanted so that they reach the surface 17 being the interface of the film 12 and the substrate 11, to form the ion implantation region 18 around the region 14 where neither the mask 13 nor 16 exists. After annealing at the temperature of 400-500 deg.C the gate oxide film 17 of Al2O3 is formed in the region 14 and after anodization the region 19 is formed in the film 12. Thus each electrode of the gate, source and drain is separated by the region 19. After removing the mask 13 and 16 the level-surfaced FET is obtained.
申请公布号 JPS5698867(A) 申请公布日期 1981.08.08
申请号 JP19800000528 申请日期 1980.01.09
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 DAN SATOMOCHI
分类号 H01L29/78;H01L21/033;H01L21/265;H01L21/28;H01L21/3205 主分类号 H01L29/78
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