发明名称 MEMORY ACCESS CONTROL SYSTEM
摘要 PURPOSE:To realize a high-speed access to an external recording device in response to the degree of emergency by securing such a constitution where an access level signal is produced from each adaptor and an emergency request signal checked by an access level deciding circuit is delivered in place of the access request signal which is supplied to an arbitrating circuit. CONSTITUTION:The adaptors 3A and 3B of a memory access control system are connected to the host controllers 2A and 2B respectively and an access is given to a common memory 4 via each adaptor. When both adaptors 3A, 3B give accesses to the memory 4, an arbitrating circuit 5 checks the priority orders of access requests of both adaptors 3A, 3B to allow the accessed based on the priority orders. A buffer 7 is provided to each adaptor 3 and an access level production circuit 9 produces an access level signal in response to the storing state of the transferred data in the buffer 7. An access level deciding circuit 6 receives the signal from the circuit 9 and decides emergency degree of the access request received from the adaptor 3 to control the memory 4 according to the degree of emergency.
申请公布号 JPS6415854(A) 申请公布日期 1989.01.19
申请号 JP19870171935 申请日期 1987.07.09
申请人 FUJITSU LTD 发明人 MURANO SHOICHI
分类号 G06F12/00;G06F13/18;G06F13/362 主分类号 G06F12/00
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