| 摘要 |
PURPOSE:To establish synchronization concerning the execution order in respective processings between a scalar operating part and a vector operating part, by insering a predetermined instruction into a series of instruction groups. CONSTITUTION:Instruction control part 3 of data processing part 2 fetches instructions from memory 1 and distributes and controls them, and scalar operating part 4 receives scalar instructions from control part 3 to execute processings, and vector operating part 5 receives vector instructions from control part 3 and executes the vector operation processing while transmitting and receiving data to and from memory 1. Then, vector instructions V1, V2... and scalar instructions SC1, SC2,... are executed independently of each other in parallel. In this case, when processing for instruction V5 and following instructions are executed, a predetermined WAIT instructions V1-V4 and SC1-SC4, and processings are executed in the mode where parallel processings are permitted, and at this instruction time, the execution order is synchronized between operating parts 4 and 5. |
