Processor interrupt device for an electronic engine control apparatus

摘要

An electronic control apparatus includes a digital processor which receives data from a plurality of sensors which monitor conditions of the engine and supply output signals to the processor for controlling various actuators that control energy conversion functions within the engine. Control signals that are produced in response to data processing operations carried out by the processor are generated in accordance with a selective incrementing of engine timing codes that are successively compared with control data supplied by the processor in response to its processing operations. Selected ones of the control signals are employed to generate interrupts that are supplied to a status register. The contents of the status register are combined with the contents of a mask register to supply interrupts to the processor. The interrupts are assigned in accordance with prescribed levels of priority associated with the data processing operations carried out by the processor. Through the medium of the variable engine control codes supplied by the processor through which control signals for the actuators are eventually produced, the time of occurrence of the interrupts in response to the control signals is controllably variable.