发明名称 PARALLEL FEEDBACK TYPE ANALOGGDIGITAL CONVERTER
摘要 PURPOSE:To improve the differentiation linearity, by eliminating the offset effect of a D/A converter. CONSTITUTION:For the switching comparators 3-5, the unit comparators 3a-5a of the upper side operate first to perform a comparison between the input analog voltage and the 1st reference voltage, and the higher-rank bit group is obtained through the encoding circuit 28 for the A/D conversion output. The digital codes of the higher-rank bit group are stored in the registers 29 and 30. The output of the register 29 is converted into the analog voltage through the D/A converter 31 to be fed back as the reference voltage to obtain the lower-rank bit group. The auxiliary comparators 24-27 are provided in addition to the main comparators 3-5. Thus the value of the lower-rank bit group is set up by the comparison results of the auxiliary comparators in case the input analog voltage gets out of the range of comparison of the main comparators when the 2nd reference voltage becomes out of the normal value due to the offset of the D/A converter and other factors. At the same time, the value is compensated also for the higher-rank bit group.
申请公布号 JPS5694832(A) 申请公布日期 1981.07.31
申请号 JP19790171668 申请日期 1979.12.27
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 SHIMIZU SHIYOUICHI;TORII KENICHI
分类号 H03M1/14;H03M1/36 主分类号 H03M1/14
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