发明名称 COMPLEMENTARY MOS SENSE CIRCUIT
摘要 PURPOSE:To make high the speed of signal readout and to reduce the power consumption, by providing the FF in cross connection for the input and output terminals of two C-MOS inverters with an MOS transistor which prechanges FF into an intermediate potential before data input. CONSTITUTION:FF is constituted by cross connection of input and output terminals of the C-MOS inverter 13 consisting of p,n-channel MOS transistors (TR) 11, 12 and the inverter 16 consisting of similar transistors TR14, 15. At the power supply and ground side of FF, p,n-channel MOS TRs 17, 18 for FF activation inputting clock signals phi, inversion phi' to the gate are provided. Further, between the input terminals R1, R2 in common use of the output terminal of FF, a precharge use MOS TR19 with different conductive period as TRs 17, 18 and driven with the clock signal phi before the input to FF, is connected. Thus, since FF is precharged to the intermediate potential once at the power supply interruption prior to the data input, the response of output signal is quickened and low power consumption can be made.
申请公布号 JPS5694574(A) 申请公布日期 1981.07.31
申请号 JP19790171667 申请日期 1979.12.27
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 ISOBE MITSUO
分类号 G11C11/419;G11C7/06;G11C11/409 主分类号 G11C11/419
代理机构 代理人
主权项
地址