发明名称 Supply circuit for CMOS memory circuits - has capacitive stage to maintain supply for period following main supply drop=out
摘要 <p>The CMOS memory circuit includes a capacitive stage to provide a power supply condition for a specified period in the event of main supply failure. The main supply (1) feeds a voltage regulator (3) that is coupled to the control stage (4.1) of the memory circuit (4). Typically the memory circuit is a bidirectionalcounter. A comparator (5) monitors the difference in relation to a reference value (Vref 1) to control switching stages (6,7). The circuit responds to a theshold value to maintain a supply provided by a capacitor (8) and diode (9) stage.</p>
申请公布号 DE3002646(A1) 申请公布日期 1981.07.30
申请号 DE19803002646 申请日期 1980.01.25
申请人 SCHOPPE & FAESER GMBH 发明人 JOHN,REINHARD;BAHR,REINHARD
分类号 G11C5/14;G11C11/417;(IPC1-7):11C7/00;11C11/40 主分类号 G11C5/14
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