| 摘要 |
PURPOSE:To make the clock source for every processor needless and prevent transfer of the abnormal state to improve reliability, by turning off the output signal by the gate not to transfer it to the common bus for the stop control of the processor. CONSTITUTION:When abnormality occurs in processor 2 during operation of microprocessors 1 and 2 and is detected by processor 1, HALTO is oscillated from local bus control part 1-1 which performs the timing control of the local bus, and HALTO is transferred to bus control part 5. Part 5 generates control signal T11 to turn off the driver of local bus driver receiver 2-2, thereby stopping processor 2. Thus, abnormality is not output to the common bus even if it occurs in processors, and therefore, it has no influence upon other part, so that the system reliability is improved. |
