| 摘要 |
<p>The invention relates to a secure data processing system having processors processing the same information items in at least two channels and being controlled step by step. The invention consists in the fact that each channel contains a BUS line. To each BUS line an independently operating microprocessor, a read/write memory, a read-only memory, a past-memory chip, a parallel output and a serial data output circuit are connected. The BUS lines are connected to one another by a failsafe co-ordination unit which controls the acceptance and outputting of the information items. Parallel or serial information items or those already protected can be optionally entered. Protected parallel or serial information items can be optionally output. It is only the co-ordination unit, the comparators, the clock and synchronisation unit and the bit-parallel or bit-serial output in the data output circuits which are secure modules. Each microprocessor is independently controlled by itself. After the arrival of the results of the comparison, the co-ordination unit outputs an instruction for processing the next program step or for repeating the program step or for stopping. The channels are of modular construction. Several of these security output circuits can be connected to form one multiprocessing system. <IMAGE></p> |
