摘要 |
PURPOSE:To realize generation of an analog signal having a specified weight and simplify the constitution of a frequency-voltage converter, by securing a combination between a shift register and an exclusive OR circuit. CONSTITUTION:The frequency input F-in stored in the shift register 6 is output through the terminals Q1-Q5 in synchronizig with the clock pulse CLOCK. These outputs are applied to the exclusive OR circuit 7 to obtain the analog signal P at the output. The weight value of the signal P is proportional to the bit size of the register 6 and the driving voltage VCC and adversely proportional to the frequency of the CLOCK. The signal P is smoothed by the filter 5 and then converted into the voltage signal. |