发明名称 STUFFING SYNCHRONIZING SYSTEM
摘要 PURPOSE:To smooth a lead-in operation of the PLL circuit of the receiving side, by forcibly inserting and multiplexing a stuffing pulse by the nearly mean stuffing factor in case when a low group signal to be multiplexed has been cut off, in the PCM multiplexer. CONSTITUTION:A frequency dividing clock 3 divides the output of the oscillator incorporated in the multiplexer, and the frequency and the occupancy factor are set almost equally to the mean stuffing frequency and the mean stuffing factor, respectively. When an input cut-off alarm signal 2 is in a high level, a phase comparison output signal 1 is input to the stuffing control circuit 4, and the regular operation is executed. When a low group input has been cut off, the signal 2 becomes a low level, the clock 3 is input to the circuit 4, and the stuffing pulse is multiplexed by the nearly mean stuffing factor. In this way, the PLL circuit of the receiving side is operated smoothly, and also, when the input cut-off of a low group has beeb returned, the VCO of the receiving side is led in smoothly.
申请公布号 JPS5685948(A) 申请公布日期 1981.07.13
申请号 JP19790162510 申请日期 1979.12.14
申请人 FUJITSU LTD 发明人 WAKABAYASHI TAKASHI;MURASE TETSUO
分类号 H04J3/07 主分类号 H04J3/07
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