| 摘要 |
<p>PURPOSE:To obtain a write supply voltage in an output terminal as it is at the time of write by additionally connecting a unipolar transistor TR between input and output terminals and applying a voltage obtained by boosting the output voltage to the gate of this TR. CONSTITUTION:A repeat pulse signal is inputted to a third input terminal 10, and the gate potential of an N-channel MOS depletion TR 11 of a boosting circuit 19 is raised and reduced synchronously with the pulse signal, and a TR 9 is turned off during this period. In the pulse rise period, the gate potential of the TR 11 is returned to (VPP-VT1-2VT2) and a TR 12 is turned off. A TR 15 is charged by this pulse repeat until the voltage between the source and the drain reaches (VPP-3VT2+VL), and this voltage is applied to the gate of a TR 3. When the voltage VL is preliminarily set to a proper value, the voltage applied to the gate of the TR 3 is made higher than the voltage VPP and the voltage VPP is outputted to an output terminal 7 as it is.</p> |
