发明名称 PROCESSOR WITH CLOCK CONTROLLING FUNCTION
摘要 <p>PURPOSE:To reduce the power consumption of a processor with a simple constitution of circuit, by controlling the frequency of the clock with the control signal supplied from the processor having the cycle speed corresponding to the clock frequency. CONSTITUTION:When performing the process of the high-speed terminal 3, the processor 1 makes the clock frequency control circuit 2 select the high frequency clock 6 by the control output 9. In the same way, the intermediate and low frequency clocks 7 and 8 are selected respectively in case the intermediate and low speed terminals 4 and 5. As a result, the machine cycle frequency of the processor 1 becomes lower as the terminals 5, 4 and 3 are processed in that order. Accordingly, the power consumption of the processor 1 of CMOS decreases in the above-mentioned order.</p>
申请公布号 JPS5685128(A) 申请公布日期 1981.07.11
申请号 JP19790161332 申请日期 1979.12.12
申请人 NIPPON ELECTRIC CO 发明人 SHIMIZU HIROSHI
分类号 H02J1/00;G06F1/00;G06F1/04;G06F1/08;G06F1/32;G06F15/78 主分类号 H02J1/00
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