发明名称 DIGITAL EXCHANGE PROCESSING SYSTEM
摘要 PURPOSE:To enable real-time exchange by providing a circuit with flexibility by providing a multiplexing circuit and separating circuit as a substitute for a memory device for connection address dial number storage and rearrangement. CONSTITUTION:Clock pulse CP (where N is the number of channels and fS is a communication speed) of frequency NXfS is supplied to 1/N counter 12 to generate timing pulses phi1-phiN and multiplexing circuit 11 sends encoded signal CD, inputted to respective channels CH1IN-CHNIN, to separating circuit 15 as a time-division multiplex signal. On the basis of a control indication signal, control circuit 13 informs separating circuit 15 of which address is assigned to which time slot. For example, address CHNOUT is assigned to time slot CH1IN and separating circuit 15 connects CH1IN to CHNOUT. Therefore this system does not take much time for exchange and provides the circuit with flexibility in comparison with the usual system that stores and makes rearrangement of connection address dial numbers by using a memory unit.
申请公布号 JPS5684096(A) 申请公布日期 1981.07.09
申请号 JP19790162015 申请日期 1979.12.12
申请人 FUJITSU LTD 发明人 KIMURA SHIYUUJI;SAKAI TAKESHI
分类号 H04Q11/04;(IPC1-7):04Q11/04 主分类号 H04Q11/04
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