DIGITAL FREQUENCY MEASURING CIRCUITRY

摘要

Circuitry for developing a binary number proportional to the frequency of an input signal includes a first and second shift register and an adder. Timing control circuitry establishes a 16 bit computation period and also develops a fixed binary number. Circuit means are provided for interconnecting the adder and the first register for increasing the content of the register by the fixed binary number once each cycle of the input signal to be measured. Thereafter the content of the register is reduced by a fixed proportion of its content during each of a plurality of computation periods to cause the register to exponentially decay until the next input cycle is detected whereupon the process is repeated. At the beginning of each cycle of the input signal the content of the first register is transferred to a second or buffer register where the data may be used to drive a gage or other output device. The circuitry is particularly useful for processing a relatively low information rate signal such as often found in automotive speed transducers. The prior art digital circuitry requires a high information rate transducer in order to achieve a reasonable degree of resolution within a fixed time frame.