| 摘要 |
PURPOSE:To increase the frequency of clock signal, by obtaining an output without delay time, through the supply of the current multiplied by the current amplification factor for the signal current to the base of opposing transistors in the current Miller circuit. CONSTITUTION:Transistors (TR)11, 12 and charge transfer element BBD are provided, the collector of TR12 is connected to the base of a npn TR21, the emitter of TR21 is to the base and collector of npn TR22, and the base of TR22 is connected to the base of npn TR24. In such a circuit, with signals phi2 and phi1 respectively at voltage VDC and voltage VDC+VP, when a current flows via TR12, TR21, is on and a current multiplied by the current amplification factor hFE of the signal current is given to the base of TRs22 and 24. Then, TRs22 and 24 immediately turn on, and after that, a current equal to that flowing to TR24 is output 26 via TR22, the same as conventional current Miller circuits. Thus, the output without delay time is obtained to enable to increase the frequency of the clock signal. |
