Input-output control for microprocessors - has parallel-serial converter operating with buffer data store

摘要

An intermediate memory is located between the processor and a serial to parallel input-output converter allows a microprocessor system to operate at higher data rates. The microprocessor system consists of a programme memory (3), a data memory (3) and a central processor (1). The processor is coupled over a data bus (DS1) and a control bus (SL1) to a buffer memory (7) that is coupled to a converter that outputs and receives serial single bit transmissions with external devices. The converter transmits and receives 8-bit parallel transmissions to and from the buffer that is sized to hold a complete data block.