| 摘要 |
PURPOSE:To reduce the area in realizing the logic with an LSI circuit, by controlling the status of four data lines through the combination of two control signals. CONSTITUTION:When the outputs Q1-Q4 of all bits are desired to be latched to the same logic level as data signal, the control signals A, B are made to ''H'' and ''L'' levels. Thus, the output of the NAND gate to which data are input is the inversion of data and the output of OR gate is the same polarity as data, then data appears at the latch circuit. To make the specific bit to ''L'', the signals A, B are at ''L'' and the data of the bits are made to ''L'', then the specific bit is is at ''L'' and other bits keep preceding level. To make the specific bit only to ''H'', the signals A, B are made to ''H''. Further, to latch all the bits to the preceding data, the signals A, B are made to ''L'' and ''H'' levels. |
