| 摘要 |
PURPOSE:To improve the performance of a circuit scan by making circuit information read run precede a control run by separately providing a circuit selection line for a circuit information fetch and a circuit selection line via which control information is sent to a circuit coordinate part. CONSTITUTION:The output of address delay part 19 of common control part 1 is decoded by address decoder 20 into selective signal 109, which is used in a circuit scan run. Answer signal generation part 33 of circuit coordinate part 2 sends delay control signal 110 by delaying control-in signal 103 by a constant time. As signal 103 is sent out in the selection time of the read run, coordinate part 2 sends circuit information to bus-in line 105 and sends signal 110 back. When signal 110 arrives, control part 1 reads the circuit information and stores it in register 14. In the control run, address selection line 109 delayed by signal 110 turns on to start the transmission of control-out signal 104 firstly and at this point in time, the read of the circuit information is completed, so that the scanning time in the control run will be shortened. |
