发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To increase both reliability and data processing capacity, by reading the data of the specified address during a refresh cycle and then carrying out the detection and correction of an error of the read-out data. CONSTITUTION:The column address strobe (CRAS) signal or the chip selection signal is applied selectively to the specified block within the memory element blocks 1A1-1An and 1D1-1Dn during the refresh cycle. Then the data of the specified address is read out to be stored in the data register 2. This data is sent to the error detection/correction (ECC) circuit 3 in the refresh cycle for checking of the error. In case a correctable error (such as 1-bit error) is detected, the error bit is corrected and then written into the above-mentioned specified address as the rewriting data (DI0-DIn-1) during the refresh cycle.
申请公布号 JPS5677985(A) 申请公布日期 1981.06.26
申请号 JP19790152766 申请日期 1979.11.26
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 YAMAZAKI GINZOU
分类号 G06F12/16;G06F11/10;G11C11/401;G11C29/00;G11C29/42 主分类号 G06F12/16
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