发明名称 MEMORY ACCESS CIRCUIT
摘要 PURPOSE:To secure a high-speed access for a memory cell with a reduced amount of power consumption, by applying the voltage fluctuation according to the potential of the 2nd signal line to the base of a transistor of a current sink circuit and thus controlling the memory holding current. CONSTITUTION:The holding current control circuit 31 consisting of the resistances 42 and 43 is connected to the base of the transistor 40 in the current sink circuit 30. The memory holding current i1 turns to the function of the potential VWL of the 2nd signal line 11, and the memory holding current i145 turns to a major current in the word selection state under which a pair of word lines 10 and 11 have high potentials. While the current i1 becomes to a minor current in the nonselection state under which the lines 10 and 11 have low potentials. The fall time of the singal line 11 becomes slower than the fall time of the 1st signal line when the word selection changed to the word nonselection. Thus the discharge from the wiring capacity or the like can be absorbed in a short time to accelerate the transition. And a minor current is available during the nonselection state to reduce the amount of power consumption.
申请公布号 JPS5677981(A) 申请公布日期 1981.06.26
申请号 JP19790153047 申请日期 1979.11.28
申请人 OKI ELECTRIC IND CO LTD 发明人 KANOU MASAYUKI;MURASAWA KEIJI
分类号 G11C11/414;G11C8/08 主分类号 G11C11/414
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