| 摘要 |
<p>A phase-locked loop circuit, having an oscillator (15) controlled by a voltage (VO") related to phase difference between a reference signal (fL) and a loop signal (fL"), is stabilized by a crystal oscillator (18). The voltage controlled oscillator signal (f1) is frequency-substracted from the crystal oscillator signal frequency (fx) to provide an input signal (fS) to a frequency-arithmetic synthesizer (21) which provides the loop signal (fL") to the phase detector (12) for comparison with the coming reference signal. Use of a frequency-adder circuit between the voltage controlled oscillator (15) and the frequency-subtractor (16) and receiving an addition frequency derived from the frequency-arithmetic synthesizing circuit (21) is utilized to decrease the loop gain and provide enhanced characteristics. </p> |
