发明名称 PREPARATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To implement a high integrated MOSIC having a good junction, transistor characteristics on the front surface by a method wherein at the rear side of a semiconductor substrate, P is diffused. CONSTITUTION:On the surface of an N type substrate, a P layer 2 is formed and a field oxide film 4 is selectively formed, and at the same time, an oxide film 5 is formed on the rear plane. Next thereto, a source 8 drain 9 and an electrode picking up layer 10 of n channel FET are installed and further, a source 11 drain 12 of an p channel FET and an electrode picking up layer 13 to the substrate 1 are installed. Next, only the surface is coated with an insulating film 14 and a regist 15 is laid thereupon to etch the oxide film 5 at the rear plane. The regist 15 is removed and P is diffused in both the front and the rear plane. At this time, an N<+> layer 16 is formed on the rear plane and Na<+> and a heavy metal are brought in. After PSG of high concentration which is formed during diffusion is removed, a window is opened and an Al wiring 17 is formed. With this constitution, a MOSIC of a good characteristics is obtained.
申请公布号 JPS5674939(A) 申请公布日期 1981.06.20
申请号 JP19790150729 申请日期 1979.11.22
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 NOZAWA HIROSHI
分类号 H01L21/822;H01L21/31;H01L21/322;H01L21/76;H01L21/8238;H01L27/04;H01L27/092;H01L29/78 主分类号 H01L21/822
代理机构 代理人
主权项
地址