| 摘要 |
PURPOSE:To obtain the necessary extent of delay by use of the address designation part, by resolving the extent of delay of an input data to be delayed so that it can be the maximum value of the data made by a binary code, and designating the address by the address designation part. CONSTITUTION:A timing signal generated in the course of designation of the address of N-1 from the timing output terminal AG of the timing circuit 24a is provided as a gate signal to the AND circuits 30, 48. An input data A is supplied to the data input terminal IN of the first RAM 22a through the AND circuit 30 and the OR circuit 36, and is stored in N-1, that is, the address part of ''0''-''7''. A data of the address designation part of N-1, which has been stored is set to the first D type FF circuit 28. A data which is set to the second RAM 22b is repeated in order as data A1 data B1 data C1 data A-.... |
