Saturation limited bias circuit for complementary transistors

摘要

A clamp circuit is disclosed which includes a transistor connected between the multiple collectors of a bias current device for complementary output transistors and the output terminal of a driver circuit. The clamp transistor is rendered conductive by signals at the output terminal of the driver circuit which would otherwise heavily saturate the bias current device. The clamp transistor conducts current to provide additional needed bias to the complementary output device and to keep such current from disturbing the magnitudes of currents provided by a current generator circuit which is also connected to the bias current device.