发明名称 SEMICONDUCTOR INTEGRATED LOGIC CIRCUIT
摘要 PURPOSE:To reduce a malfunction due to the generation of a noise, by controlling the ON and the OFF states of a first bipolar transistor by comparing a voltage impressed on the base of a second bipolar transistor with a reference voltage, and changing the level of the base of the first bipolar transistor CONSTITUTION:In a differential circuit consisting of a transistor Q5 and a transistor Q6, the voltages to be impressed on the base of each transistor are compared with each other, and the transistor on which a large voltage is impressed is turned ON, and the other is turned OFF. In other words, no simultaneous ON states of the transistors Q3 and Q4 is generated even in both cases where output O1 is switched from a low level to a high level and vice versa, and also, no simultaneous ON states of them is generated even in a stationary state. Therefore, no through current flows on the transistors Q3 and Q4. In such a way, it is possible to prevent the malfunction due to the noise generated by a large current from occurring.
申请公布号 JPS6446315(A) 申请公布日期 1989.02.20
申请号 JP19870203339 申请日期 1987.08.15
申请人 NEC CORP 发明人 NISHIYAMA KEIICHI
分类号 H03K19/088;H01L21/8222;H01L27/082;H03K19/003 主分类号 H03K19/088
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