| 摘要 |
PURPOSE:To decrease the number of system down times unnecessary and to increase the system operation time, by temporarily extending the memory readout and repeating the retrial to the parity error generation due to temporary noise. CONSTITUTION:When an impulse noise is input tentatively, the parity error is detected at the parity detection circuit 4 and the parity monitor signal 10 is a waveform as a low level l15. When this low level is input to a system clock pulse generating circuit 6, no frequency division is made at 17 of (b) at the leading pulse 16 of (a), and the system clock pulse keeps high level with the timing 13 of this low level l. In this case, the clock pulse is extended for one period of the clock pulse of (a) and the readout of memory is again made by this. Then, the number of system down times is decreased and the system operation time can be increased. |
