Vertical synchronising signal detector circuit - stores synchronising pulse for use if transmitted signal falls out in e.g. video recorder

摘要

A vertical synchronising signal detector receives a synchronising signal mixture of horizontal and vertical components. This incoming signal controls a pulse generator which generates a timing pulse having a period of half the horizontal synchronising pulse and delays it by a quarter period. The timing pulse control a vertical signal extractor circuit which also receives the signal mix, and compares the vertical synchronising signal with a reference signal. An output impulse is generated when full coincidence is detected. The output signal from the extractor is fed to a comparator with the timing pulse and on coincidence of the two a vertical synchronising signal impulse is generated and also stored. If no vertical synchronising signal is received the stored signal is sent out on receipt of the timing pulse. In this way transiently defective vertical synchronising signals e.g., due to scratches or dust, are replaced without loss of picture quality.