发明名称 BUFFER MEMORY CONTROL SYSTEM
摘要 The buffer memory is made up of data memories 1-1 to 1-n. Ordinary memory access involves access only to the buffer memory. Tag memories 2-1 to 2-n and comparators 6-1 to 6-n detect whether or not data of a requested address exists in the buffer memory. When it does not, a replace block is selected by replace memory 4 and replace logic circuit 8 and moved from the buffer memory to a main memory when it is detected by change bit memories 3-1 to 3-n that the replace block has been changed since it was loaded into the buffer memory, and a block including data of the requested address is moved from the main memory to the buffer memory (by write control 9, selectors, 11, 21-1 to 21-n etc). …<??>When data of block size or an integral multiple of block size is to be written, when it is detected that data of a requested write address does not exist in the buffer memory, a changed replace block is moved from the buffer memory and the data to be written is written directly into the buffer memory space vacated by the replace block, without moving data of the requested address from the main memory into the buffer memory.
申请公布号 AU6479980(A) 申请公布日期 1981.06.11
申请号 AU19800064799 申请日期 1980.11.28
申请人 FUJITSU LTD. 发明人 M. TAKAHASHI
分类号 G06F12/08 主分类号 G06F12/08
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