| 摘要 |
PURPOSE:To improve vertical synchronization tection performance, by comparing the pattern, which is obtained by slicing the video signal by a prescribed level and subjecting it to serial-parallel conversion, with the storage pattern corresponding to the regular vertical synchronizing signal. CONSTITUTION:Output pulses obtained by slicing the TV video signal input in multilevel circuit 4 by a prescribed level are taken into shift register 6 at every fixed timing and are converted to parallel data. The address of ROM7 is designated by this parallel data; and since data ''1'' is stored previously in the designation address dependent upon parallel data in the vertical synchronizing signal period in this ROM, the vertical synchronizing signal of level ''1'' is obtained as the detection output in the period, when the pattern of parallel data obtained at every fixed timing and the parallel data pattern to designate the address where data ''1'' is stored previously agree with each other, namely, in the vertical synchronizing signal period. Thus, since the vetical synchronization detection dependent upon time series pattern is performed, the detection performance can be improved. |
