发明名称 FREQUENCY MULTIPLYING CIRCUIT
摘要 PURPOSE:To obtain sufficient attenuation and to remarkably improve the time delay, by lowering the frequency multiplying efficiency through forward bias current to a diode. CONSTITUTION:When no output is present at a detector of out of synchronism, a terminal 28 is grounded, a varactor (generally, frequency multiplying diode) is short-circuited with a resistor 24 and it is placed to bias state excellent in the frequency multiplying efficiency, and the signal in frequency nfs input from a terminal 21 is multiplied to the signal in mnfs and output to a tuning circuit 23. When an output is present at the detector for out of synchronism, a voltage flowing forward bias current to the varactor 22 is connected to a terminal 28 to remarkably lower the frequency multiplying efficiency of the varactor 22 and to remove the output.
申请公布号 JPS5666906(A) 申请公布日期 1981.06.05
申请号 JP19790142569 申请日期 1979.11.02
申请人 MITSUBISHI ELECTRIC CORP 发明人 YAMANAKA OSAMU
分类号 H03B5/32;H03B19/05;H03B19/16 主分类号 H03B5/32
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