| 摘要 |
PURPOSE:To realize each type of logic with the same hardwear, by using a set of ROMs which reads successively the intersections between each input/output line and the product term line, securing a correspondence to the memory address and at the same time setting each intersection based on the memory contents of the ROM. CONSTITUTION:The ROM7 programmed previously is connected to the address counter 8 which designates the memory address of the ROM7 provided on the next stage. And the signals supplied from the ROM7 are applied to the AND circuit 60 via the switch 10 which gives switching between the AND item and the OR item. The output of the circuit 60 is sent to the output registers 81-8n via the output distributor 70, and thus the output buffer memories 91-9n produce the output signals 41-4n. On the other hand, the input signals 11-1n are connected to the circuit 60 via the input scanner 20, change-over switch 100, NOT circuit 30, AND circuit 40 connected to the switch 10, and AND register 50 which stores the product term temporarily each. The circuit thus constituted is controlled by the control circuit 110. |
