| 摘要 |
PURPOSE:To increase the speed of processing by eliminating troubles regarding design by avoiding contention while eliminating write operation by time slots when a read by time slots is taken in some signal processing run. CONSTITUTION:Processing result C1.S2(i-1) of small signal processing C1 in the (i-1)-th signal processing run is read out of memory cell group M1 by time slot TS1 and then processed by signal processing circuit 11, whose processing result C1.S1(i) is written in memory cell group M(m+1). Similarly, processing result S2.S2(i-1) of small signal processing C2 in the (i-1)-th signal processing run is read out of memory cell group M2 by time slot TS2 and then processed by circuit 11, whose result C2.S2(i) is written in preceding memory cell group M1. Thus, the read operation and write operation never cause contention in the same signal run, troubles regarding design are eliminated and the speed of the processing can be increased. |
