发明名称 |
Parallel analog-to-digital converter |
摘要 |
An analog signal is converted into an n bit digital signal by n comparator circuits which compare the analog input to 2n-1 reference inputs. Each comparator output alternates as the analog signal increases through the reference levels. Logic circuitry including n-1 exclusive-OR gates decodes the comparator outputs into an n bit code. A comparator circuit for comparing the analog input signal with each of several reference levels and providing an alternating output includes a pair of differential input transistors and a current sink transistor associated with each reference level. The collectors of the differential transistor pairs are cross coupled to two output resistors which are connected to a differential exclusive-OR gate. A latching circuit is operable to latch the comparator output when the comparator is in other than the comparing mode.
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申请公布号 |
US4270118(A) |
申请公布日期 |
1981.05.26 |
申请号 |
US19790005526 |
申请日期 |
1979.01.22 |
申请人 |
ANALOG DEVICES, INCORPORATED |
发明人 |
BROKAW, ADRIAN P. |
分类号 |
H03M1/00;(IPC1-7):H03K13/17 |
主分类号 |
H03M1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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