| 摘要 |
PURPOSE:To reduce the occupying area of a memory cell and to accelerate the operating speed thereof by forming a column line wiring part connected to a gate electrode through an insulating film on a capacitor for memory. CONSTITUTION:The first electrode 43 is provided through a silicon dioxide 42 on a P<+> type silicon substrate 41 and positive potential is applied to the electrode 43, thereby forming an N type inversion layer 44 and the electrode 43. The second electrode 48 is provided through a gate insulating film 47, and an MOS transistor 49 is formed of a gate electrode 48, an N<+> type region 48, an inversion layer 44 and an insulating film 47. The electrode 48 is extended through a thick insulating film 50 on the electrode 43, and is brought into contact with the external wire 43 forming a column line by the opening 52 of the protecting insulating film 51 on the electrode 48. The parasitic capacity between the electrode 48 and the electrode 43 can be reduced and the operating speed thereof can be accelerated by the film 50. |
