| 摘要 |
PURPOSE:To readily provide the high integration and density of the semiconductor device and to accelerate the operating speed of the device by forming an orthogonal matrix array in the transistors of the semiconductor device having an NAND function as a whole and constructing it to operate in a downward direction. CONSTITUTION:Transistors Q1-Q3 each having a collector in a region 4, bases in regions A1-A3 and emitters in regions B1-B3 are sequentially formed in the first direction, the base regions A1-A3 of the respective transistors are connected in a semiconductor wiring layer 12 to a metallic wiring layer 14 and the emitter regions B1-B3 are connected to the metallic wiring layers C1-C3 respectively. The collector regions 4 of the transistors Q1-Q3 are connected through a semiconductor wiring layer 17 to the base region 9 of the transistor M and the emitter region 10 is connected to the metallic wiring layer 20. Since the layers 14, C1-C3 and 20 are led in a direction perpendicular to the first direction, they can be simply constructed in high density. Since the respective transistors are formed in downward direction in operation, high speed transistors can be obtained. |
