发明名称 DATA TRANSMISSION CONTROLLER
摘要 PURPOSE:To make it possible to control a communication circuit with small memory capacity, by calculating a parity check sequence in common following basic- mode and high-level transmission control procedures. CONSTITUTION:On the basis of information from transmission control procedure deciding circuit 2, data buffer 9 for the basic mode transmission control procedure or data buffers 10 and 11 for high-level transmission control procedure are used and the complement arithmetic indication is sent to complement circuit 7. In case of the basic mode transmission procedure, transmitted data in buffer 9 are sent to the dividing circuit for division and its output is sent to parity check sequence BCC adding circuit 8, which adds BCC supplied via line 25 to the transmitted data and requests the transmission to the circuit. In case of the high-level transmission control procedure, on the other hand, outputs of buffers 10 and 11 are added 5 together and the result is sent to the dividing circuit to perform the same processing. Thus, the communication circuit can be controlled with small memory capacity.
申请公布号 JPS5660147(A) 申请公布日期 1981.05.23
申请号 JP19790136161 申请日期 1979.10.22
申请人 NIPPON ELECTRIC CO 发明人 SAKATA SHIROU
分类号 H04L29/06;G06F13/00;H04L1/00 主分类号 H04L29/06
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