| 摘要 |
PURPOSE:To reduce the occupying area of a memory cell and to accelerate the operating speed thereof by forming a column line wiring part connected through an insulating film to a gate electrode on a capacitor for integrated memory. CONSTITUTION:The first electrode 43 is provided through a silicon dioxide 42 on a P<+> type silicon substrate 41 and positive potential is applied to the electrode 43, thereby forming an N type inversion layer 44 on the surface of a substrate. A capacitor 45 is formed of the layer 44 and the electrode 43. The second electrode 48 is provided through a gate insulating film 47, and an MOS transistor 49 is formed of a gate electrode 48, an N<+> type region 46, an inversion layer 44 and an insulating film 47. The electrode 48 is extended through a thick insulating film 50 on the electrode 43, and is contacted with the column line external wire 53 through the opening 52 of the protecting insulating film 51. The capacity between the first electrode and the second electrode can be reduced by the film 50 and the operating speed can be accelerated. The region 46 is used as a digit line. |
