| 摘要 |
<p>PURPOSE:To make it possible to generate a highly accurate timing by a small- sized and inexpensive circuit, by taking the logic of one pair of highly accurate timing generating circuits and a lowly accurate timing generating circuit. CONSTITUTION:The highly accurate timing generating circuit 1 inputs a basic clock C0, outputs the highly accurate timings taua, taub, and provides them to the gates 12, 13 of the lowly accurate timing generation system I. The timing t10 of the timing generation circuit 11 is broader than taua in width, and its width is shaped by taua, and it becomes timing T1a. The timing t12 of the circuit 11 becomes tau1b after its width has been shaped by taub, and the trailing edge of the timing t11 of the circuit 11 is regulated by tau1b to obtain the timing T1b. The timing generation system II-N have the same structure as the timing generation system I.</p> |
