摘要 |
PURPOSE:To enable to recognize the state of each terminal at a bundle, by the transmission and reception of data for all the terminals at the same time in synchronizing with clock pulse delivered from the central control section. CONSTITUTION:A central control section 1 sets the transmission data to output terminal S1, an output terminal CLK is taken as 1, to deliver data to the terminal control section of in-room units 2, 3, 4, and to receive data from a reception line RL1. Further, after clock pulse is taken as phi, this reception data is read, and this is repeated in almost a constant time ta similarly. Further, when the data transmission of a given number is finished, one block is ended and before the transmission of next one block is started, the pulse is taken as phi during the start time tb. After the time tb, the setting of data, delivery of clock pulse and data read-in are made. During this operation, the logical judgement whether or not the output teminal CLK which makes output by itself at all times and the input terminal IRQ reading in this output terminal CKL are changed in the same timing, is made. |