| 摘要 |
An analog-to-digital conversion circuit having a number of series-connected stages, each stage determining the difference between a signal current input and a reference current input, and at positive values of said difference transferring a current proportional to said difference to the succeeding stage. In each successive stage, the reference current is subtracted from the signal current until the residual current is smaller than the reference current. The number of successive stages in which this subtraction takes place can be detected to indicate the level of the input current. Each stage includes a common point for receiving the difference between the signal current and the reference current, a current path from said common point to its output for transferring a current proportional to the difference if positive, a current path from said common point to a current sink if said difference is negative; said current paths being unidirectional and biased such that only one is forward biased at one point in time. Each stage also detects the polarity of said difference to obtain a digital measure of the value of the signal current. |
