发明名称 FM DETECTING CIRCUIT
摘要 PURPOSE:To improve the whole S/N by providing a couple of FM detecting circuit in parallel and by adding inphase signal components and noise components, which are out of phase at random, together respectively. CONSTITUTION:Since balanced differential multipliers 3 and 3' constituting the quadrature detecting circuit are provided in parallel, the whole detection output is the sum of detection outputs of the both. As a result, since signal components Vs and Vs' of their detection outputs are in phase, the whole detection output can be increased by 6dB. Since noise components Vn and Vn' are out of phase at random, on the other hand, the whole detection output is increased by only 3dB. Thus, the whole S/N can be improved by 3dB.
申请公布号 JPS5656008(A) 申请公布日期 1981.05.16
申请号 JP19790131880 申请日期 1979.10.15
申请人 HITACHI LTD 发明人 WATANABE KAZUO;IENAKA MASANORI;KOMINAMI YASUO
分类号 H03D3/00;H03D3/06;H03D3/22 主分类号 H03D3/00
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