摘要 |
PURPOSE:To enable to detect out of synchronism including input interruption, by processing the exclusive logical sum signal between input and output signals and the differentiation signal relating to the input signal, at a logic circuit. CONSTITUTION:The output of an exclusive logical sum gate EXOR of a phase comparison circuit 1 is the pulse width modulation signal having the repetitive frequency of the frequency difference ¦f1-f2¦ between the input and output signals. The input of the inversion of this signal and the differentiation signal of the input signal to a NAND gate 47 causes the output of the NAND gate 47 to be intermittent pulse train, to zero the output Q'1 of a monostable multivibrator 41. On the other hand, since the monostable multivibrator 42 is always triggered with the differentiating signal of the input signal, the output Q'2 is always 1. Accordingly, the output of a NAND gate 48 is ''1'', which shown asynchronizing state of external part. |