发明名称 INTERRUPTION DISPLAY SYSTEM
摘要 PURPOSE:To make it possible to easily discriminate an error, by informing to an operator by the next manual operation and displaying the address where an error has occured and the error, in case a memory reference error has occurred at the time of memory access by the manual operation. CONSTITUTION:It is assumed that a memory parity has occurred when a data of the main memory 5 is being read from the debug console 2. At first, when a switch A of the indicator switch 3 is set and an interruption signal is given to CPU1, CPU1 accesses the main memory 5 after reading A from the switch 3, and thrns on the address lamp A in the switch 3. And at the time of the next manual operation, a REJECT signal 9 is output to the switch 3 from the debug console 2, the REJECT lamp is turned on, and the memory address where an error interruption has occurred, and the data are informed to an operator.
申请公布号 JPS5652451(A) 申请公布日期 1981.05.11
申请号 JP19790128606 申请日期 1979.10.05
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 MICHIOKA KAZUTOSHI
分类号 G06F11/22 主分类号 G06F11/22
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