DETECTEUR DE COMPTAGE D'IMPULSIONS PRESENTANT DES PARTICULARITES GARANTISSANT LA SECURITE EN CAS DE DEFAILLANCE

摘要

1296065 Counters WESTINGHOUSE ELECTRIC CORP 19 Feb 1970 [19 Feb 1969] 8010/70 Heading G4A The output from a predetermined counter is dependent on occurrence of a signal resetting the counter. A binary counter 12 receives a train of 31 pulses A followed by a space A1. A reset pulse B is coincident with space A1 and resets all stages FF1-FF5. The predetermined count is set up by connecting appropriate Q and Q terminals to corresponding condition sensing circuits 22a-22e. When the predetermined count is attained, a burst of high frequency pulses from a generator 36 passes through 22a- 22e and is applied to a gate 26s. The resetting pulse B is applied to a sensing circuit 22m and after the counter has reset the Q terminals of all stages enables circuits 22n-22r so that another burst of pulses from 36 passes through 22m-22r to a detector 44 and an R-C circuit 42 which stretches the reset pulse effectively to cover the whole of the subsequent counter cycle. This pulse opens gate 26s to the predetermined count signal to produce an output at 46. Failure at any point stops the output. The system is applicable to fail-safe systems such as railways and multiplexing systems where each receiver station is allotted a different time slot.