| 摘要 |
PURPOSE:To simplify the circuit constitution, by constituting a binary multiplier by the effective combination of logical operation circuits to reduce the number of all elements of the circuit. CONSTITUTION:The first NOR circuit 1 where respective bits of inversion signals X and Y of multiplicand X and multiplier Y and augend B are input and the first AND circuit 4 and the second NOR circuit 5 where output signal A of circuit 1 and augend B are input are provided. Further, the third NOR circuit 6 where output A.B from circuit 4 and output A+B from circuit 5 are input is provided to output A.B+A+B=A(+)B. Carry signal C is applied to the first inversion circuit 9, and the output of circuit 9 and the output of circuit 6 are applied to the second AND circuit 10, and the output of circuit 10 and the output of circuit 5 are applied to the fourth NOR circuit 11, and new carry number C0 to the next stage is output as the output. Signal C and output A+B of circuit 6 are applied to exclusive NOR circuit 7, and output A(+)B(+)C is inverted by the second inversion circuit 8 to output output signal S, thus reducing the number of circuit elements. |
